Abstract, title and references: The aim of the paper is clear, and the findings and methods are also clear. For paper content, the title is informative and relevant. References, and most of them are recent, are relevant. The references are referenced accurately and in order through their appearance in the text. The paper addressed the real-time processing of EEG signal wavelet correlations, a point which was mentioned earlier in the literature. So the authors had addressed previous literature and a research question had been found and investigated.

Introduction/ Background: The topic is clearly clarified and the research question is outlined and justified. However, the authors had referred to reference [15] as a justification of their research question. Reference 15 belongs to 2010 while the authors published their paper in 2019, therefore, its a big gap of 9 years and there are several works in the literature targeted the FPGA implementation of wavelet engines, such as the discrete wavelet transform, continuous wavelet transform and wavelet coherence etc. especially with the availability of high end FPGAs, high computational cost is no longer a big challenge.

Methods: The algorithm used is clearly explained, valid and reliable ... variables in equations are defined in the Background Section, although they should be in the Methods Section of the paper. Sufficient details are provided. There is an error in Fig. 4, I think, the data is all going out of the multipliers, so where are the two inputs to the multiplier block? The authors indicated that they encoded their data (EEG +wavelet filter coefficients) in fixed-point, but they did not mention the samples' word length. The multipliers are 9 x 9 bits in the context, how did they appear as 16 bit multipliers in Fig. 4?

Results: The analysis results of the FPGa based DWT are shown in Fig. 5 & Fig. 6 for subject 1 and 2 respectively. It was better to label the Y-axes of the two figures systematically for fair comparison. The authors only considered the correlation coefficients when making comparison between FPGA & Matlab ... however, there is the X-error and S-error, both of which are not zero. The most important is that there is no comparison of speed performance between the FPGA implementation and the Matlab one. At level 5, a maximum delay of 128 ms for the FPGA analysis, however, I think that the Matlab can be faster than this, especially the computation undertaken is not that complicated. In such a case, a laptop with Matlab can perform the real time analysis of these algorithms and there is no need for the FPGA to be involved. The authors should provide a timing analysis of the Matlab analysis in order to justify their use of the FPGA.

Discussion and Conclusions: The conclusion focused on parallel and sequential computations, although they are not mentioned throughout the manuscript. The objective of the study is set out in the conclusion. There are no references in the conclusion Section. It is better to compare the work with a similar one in the literature so as to show whether there is a competence in this work. Future work on the type of implementation is mentioned. I suggest comparing the speed of performance between the implementation of the FPGA and Matlab, which will give a clearer idea of the need for FPGA involvement.