This paper presents a novel hypervisor engineered for aerospace applications using an object oriented approach embodying time and space partitioning (TSP) on a PowerPC core embedded in a FPGA, for the NetworkCentric core avionics [1] - an architecture of cooperating components and managed by a real-time operating system to implement dependable computing and targeting simplicity. To support partitioned IMA [2] software architectures our hypervisor adapted to the aerospace application domain the Popek and Goldberg's [3] fidelity, efficiency and resource control virtualization requirements by extending them with additional ones like timing determinism, reactivity and improved dependability. A distinctive feature of the hypervisor is its I/O device virtualization approach that guarantees real-time performance and small trusted computing base

Rodosvisor- an ARINC 653 Quasi-compliant Hypervisor: CPU, Memory and I/O virtualization
Review badges
Identifiers
Rodosvisor- an ARINC 653 Quasi-compliant Hypervisor: CPU, Memory and I/O virtualization
Published in IEEE International Conference on Emerging Technologies and Factory Automation (ETFA) in 2012
Web of Science (Free Access)
Abstract
Authors
Tavares, A.; Didimo, A.; Lobo, T.; Cardoso, P.; Cabral, J.; Montenegro, S.
Publons users who've claimed - I am an author
Contributors on Publons
- 3 authors
- Contribute